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authorWim <wim@42.be>2020-01-09 21:02:56 +0100
committerGitHub <noreply@github.com>2020-01-09 21:02:56 +0100
commit0f708daf2d14dcca261ef98cc698a1b1f2a6aa74 (patch)
tree022eee21366d6a9a00feaeff918972d9e72632c2 /vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go
parentb9354de8fd5e424ac2f246fff1a03b27e8094fd8 (diff)
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Update dependencies (#975)
Diffstat (limited to 'vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go')
-rw-r--r--vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go8
1 files changed, 6 insertions, 2 deletions
diff --git a/vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go b/vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go
index fa7fb1bd..79a38a0b 100644
--- a/vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go
+++ b/vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go
@@ -4,8 +4,6 @@
package cpu
-const cacheLineSize = 64
-
// HWCAP/HWCAP2 bits. These are exposed by Linux.
const (
hwcap_FP = 1 << 0
@@ -35,6 +33,12 @@ const (
)
func doinit() {
+ if err := readHWCAP(); err != nil {
+ // failed to read /proc/self/auxv, try reading registers directly
+ readARM64Registers()
+ return
+ }
+
// HWCAP feature bits
ARM64.HasFP = isSet(hwCap, hwcap_FP)
ARM64.HasASIMD = isSet(hwCap, hwcap_ASIMD)