Update dependencies/vendor (#1659)

4 files changed, 164 insertions, 172 deletions

diff --git a/vendor/github.com/klauspost/cpuid/v2/.travis.yml b/vendor/github.com/klauspost/cpuid/v2/.travis.yml
deleted file mode 100644
index aa9bad7e..00000000
--- a/vendor/github.com/klauspost/cpuid/v2/.travis.yml
+++ /dev/null
@@ -1,67 +0,0 @@
-language: go
-
-os:
-  - linux
-  - osx
-  - windows
-
-arch:
-  - amd64
-  - arm64
-
-go:
-  - 1.13.x
-  - 1.14.x
-  - 1.15.x
-  - 1.16.x
-  - master
-
-env:
-  - CGO_ENABLED=0
-
-script:
-  - go vet ./...
-  - go test -test.v -test.run ^TestCPUID$
-  - CGO_ENABLED=1 go test -race ./...
-  - go test -tags=nounsafe -test.v -test.run ^TestCPUID$
-  - go test -tags=noasm ./...
-  - go run ./cmd/cpuid/main.go
-  - go run ./cmd/cpuid/main.go -json
-
-matrix:
-  allow_failures:
-    - go: 'master'
-  fast_finish: true
-  include:
-    - stage: other
-      go: 1.16.x
-      os: linux
-      arch: amd64
-      script:
-        - diff <(gofmt -d .) <(printf "")
-        - diff <(gofmt -d ./private) <(printf "")
-        - curl -sfL https://git.io/goreleaser | VERSION=v0.157.0 sh -s -- check # check goreleaser config for deprecations
-        - curl -sL https://git.io/goreleaser | VERSION=v0.157.0 sh -s -- --snapshot --skip-publish --rm-dist
-        - go get github.com/klauspost/asmfmt&&go install github.com/klauspost/asmfmt/cmd/asmfmt
-        - diff <(asmfmt -d .) <(printf "")
-        - GOOS=linux GOARCH=386 go test .
-        - ./test-architectures.sh
-    - stage: other
-      go: 1.15.x
-      os: linux
-      arch: amd64
-      script:
-        - ./test-architectures.sh
-
-deploy:
-  - provider: script
-    skip_cleanup: true
-    script: curl -sL https://git.io/goreleaser | VERSION=v0.157.0 bash || true
-    on:
-      tags: true
-      condition: ($TRAVIS_OS_NAME = linux) && ($TRAVIS_CPU_ARCH = amd64)
-      go: 1.16.x
-branches:
-  only:
-    - master
-    - /^v\d+\.\d+(\.\d+)?(-\S*)?$/
diff --git a/vendor/github.com/klauspost/cpuid/v2/cpuid.go b/vendor/github.com/klauspost/cpuid/v2/cpuid.go
index 43e9cc17..1d88736b 100644
--- a/vendor/github.com/klauspost/cpuid/v2/cpuid.go
+++ b/vendor/github.com/klauspost/cpuid/v2/cpuid.go
@@ -83,6 +83,7 @@ const (
 	AVX512DQ                            // AVX-512 Doubleword and Quadword Instructions
 	AVX512ER                            // AVX-512 Exponential and Reciprocal Instructions
 	AVX512F                             // AVX-512 Foundation
+	AVX512FP16                          // AVX-512 FP16 Instructions
 	AVX512IFMA                          // AVX-512 Integer Fused Multiply-Add Instructions
 	AVX512PF                            // AVX-512 Prefetch Instructions
 	AVX512VBMI                          // AVX-512 Vector Bit Manipulation Instructions
@@ -96,7 +97,9 @@ const (
 	BMI2                                // Bit Manipulation Instruction Set 2
 	CLDEMOTE                            // Cache Line Demote
 	CLMUL                               // Carry-less Multiplication
+	CLZERO                              // CLZERO instruction supported
 	CMOV                                // i686 CMOV
+	CPBOOST                             // Core Performance Boost
 	CX16                                // CMPXCHG16B Instruction
 	ENQCMD                              // Enqueue Command
 	ERMS                                // Enhanced REP MOVSB/STOSB
@@ -106,6 +109,7 @@ const (
 	GFNI                                // Galois Field New Instructions
 	HLE                                 // Hardware Lock Elision
 	HTT                                 // Hyperthreading (enabled)
+	HWA                                 // Hardware assert supported. Indicates support for MSRC001_10
 	HYPERVISOR                          // This bit has been reserved by Intel & AMD for use by hypervisors
 	IBPB                                // Indirect Branch Restricted Speculation (IBRS) and Indirect Branch Predictor Barrier (IBPB)
 	IBS                                 // Instruction Based Sampling (AMD)
@@ -117,18 +121,25 @@ const (
 	IBSOPSAM                            // Instruction Based Sampling Feature (AMD)
 	IBSRDWROPCNT                        // Instruction Based Sampling Feature (AMD)
 	IBSRIPINVALIDCHK                    // Instruction Based Sampling Feature (AMD)
+	INT_WBINVD                          // WBINVD/WBNOINVD are interruptible.
+	INVLPGB                             // NVLPGB and TLBSYNC instruction supported
 	LZCNT                               // LZCNT instruction
+	MCAOVERFLOW                         // MCA overflow recovery support.
+	MCOMMIT                             // MCOMMIT instruction supported
 	MMX                                 // standard MMX
 	MMXEXT                              // SSE integer functions or AMD MMX ext
 	MOVDIR64B                           // Move 64 Bytes as Direct Store
 	MOVDIRI                             // Move Doubleword as Direct Store
 	MPX                                 // Intel MPX (Memory Protection Extensions)
+	MSRIRC                              // Instruction Retired Counter MSR available
 	NX                                  // NX (No-Execute) bit
 	POPCNT                              // POPCNT instruction
+	RDPRU                               // RDPRU instruction supported
 	RDRAND                              // RDRAND instruction is available
 	RDSEED                              // RDSEED instruction is available
 	RDTSCP                              // RDTSCP Instruction
 	RTM                                 // Restricted Transactional Memory
+	RTM_ALWAYS_ABORT                    // Indicates that the loaded microcode is forcing RTM abort.
 	SERIALIZE                           // Serialize Instruction Execution
 	SGX                                 // Software Guard Extensions
 	SGXLC                               // Software Guard Extensions Launch Control
@@ -141,6 +152,7 @@ const (
 	SSE4A                               // AMD Barcelona microarchitecture SSE4a instructions
 	SSSE3                               // Conroe SSSE3 functions
 	STIBP                               // Single Thread Indirect Branch Predictors
+	SUCCOR                              // Software uncorrectable error containment and recovery capability.
 	TBM                                 // AMD Trailing Bit Manipulation
 	TSXLDTRK                            // Intel TSX Suspend Load Address Tracking
 	VAES                                // Vector AES
@@ -194,7 +206,8 @@ type CPUInfo struct {
 	Family         int     // CPU family number
 	Model          int     // CPU model number
 	CacheLine      int     // Cache line size in bytes. Will be 0 if undetectable.
-	Hz             int64   // Clock speed, if known, 0 otherwise
+	Hz             int64   // Clock speed, if known, 0 otherwise. Will attempt to contain base clock speed.
+	BoostFreq      int64   // Max clock speed, if known, 0 otherwise
 	Cache          struct {
 		L1I int // L1 Instruction Cache (per core or shared). Will be -1 if undetected
 		L1D int // L1 Data Cache (per core or shared). Will be -1 if undetected
@@ -363,25 +376,42 @@ func (c CPUInfo) LogicalCPU() int {
 	return int(ebx >> 24)
 }
 
-// hertz tries to compute the clock speed of the CPU. If leaf 15 is
+// frequencies tries to compute the clock speed of the CPU. If leaf 15 is
 // supported, use it, otherwise parse the brand string. Yes, really.
-func hertz(model string) int64 {
+func (c *CPUInfo) frequencies() {
+	c.Hz, c.BoostFreq = 0, 0
 	mfi := maxFunctionID()
 	if mfi >= 0x15 {
 		eax, ebx, ecx, _ := cpuid(0x15)
 		if eax != 0 && ebx != 0 && ecx != 0 {
-			return int64((int64(ecx) * int64(ebx)) / int64(eax))
+			c.Hz = (int64(ecx) * int64(ebx)) / int64(eax)
 		}
 	}
+	if mfi >= 0x16 {
+		a, b, _, _ := cpuid(0x16)
+		// Base...
+		if a&0xffff > 0 {
+			c.Hz = int64(a&0xffff) * 1_000_000
+		}
+		// Boost...
+		if b&0xffff > 0 {
+			c.BoostFreq = int64(b&0xffff) * 1_000_000
+		}
+	}
+	if c.Hz > 0 {
+		return
+	}
+
 	// computeHz determines the official rated speed of a CPU from its brand
 	// string. This insanity is *actually the official documented way to do
 	// this according to Intel*, prior to leaf 0x15 existing. The official
 	// documentation only shows this working for exactly `x.xx` or `xxxx`
 	// cases, e.g., `2.50GHz` or `1300MHz`; this parser will accept other
 	// sizes.
+	model := c.BrandName
 	hz := strings.LastIndex(model, "Hz")
 	if hz < 3 {
-		return 0
+		return
 	}
 	var multiplier int64
 	switch model[hz-1] {
@@ -393,7 +423,7 @@ func hertz(model string) int64 {
 		multiplier = 1000 * 1000 * 1000 * 1000
 	}
 	if multiplier == 0 {
-		return 0
+		return
 	}
 	freq := int64(0)
 	divisor := int64(0)
@@ -405,21 +435,22 @@ func hertz(model string) int64 {
 			decimalShift *= 10
 		} else if model[i] == '.' {
 			if divisor != 0 {
-				return 0
+				return
 			}
 			divisor = decimalShift
 		} else {
-			return 0
+			return
 		}
 	}
 	// we didn't find a space
 	if i < 0 {
-		return 0
+		return
 	}
 	if divisor != 0 {
-		return (freq * multiplier) / divisor
+		c.Hz = (freq * multiplier) / divisor
+		return
 	}
-	return freq * multiplier
+	c.Hz = freq * multiplier
 }
 
 // VM Will return true if the cpu id indicates we are in
@@ -911,6 +942,7 @@ func support() flagSet {
 		fs.setIf(ecx&(1<<29) != 0, ENQCMD)
 		fs.setIf(ecx&(1<<30) != 0, SGXLC)
 		// CPUID.(EAX=7, ECX=0).EDX
+		fs.setIf(edx&(1<<11) != 0, RTM_ALWAYS_ABORT)
 		fs.setIf(edx&(1<<14) != 0, SERIALIZE)
 		fs.setIf(edx&(1<<16) != 0, TSXLDTRK)
 		fs.setIf(edx&(1<<26) != 0, IBPB)
@@ -949,6 +981,7 @@ func support() flagSet {
 				// edx
 				fs.setIf(edx&(1<<8) != 0, AVX512VP2INTERSECT)
 				fs.setIf(edx&(1<<22) != 0, AMXBF16)
+				fs.setIf(edx&(1<<23) != 0, AVX512FP16)
 				fs.setIf(edx&(1<<24) != 0, AMXTILE)
 				fs.setIf(edx&(1<<25) != 0, AMXINT8)
 				// eax1 = CPUID.(EAX=7, ECX=1).EAX
@@ -980,9 +1013,23 @@ func support() flagSet {
 		}
 
 	}
+	if maxExtendedFunction() >= 0x80000007 {
+		_, b, _, d := cpuid(0x80000007)
+		fs.setIf((b&(1<<0)) != 0, MCAOVERFLOW)
+		fs.setIf((b&(1<<1)) != 0, SUCCOR)
+		fs.setIf((b&(1<<2)) != 0, HWA)
+		fs.setIf((d&(1<<9)) != 0, CPBOOST)
+	}
+
 	if maxExtendedFunction() >= 0x80000008 {
 		_, b, _, _ := cpuid(0x80000008)
 		fs.setIf((b&(1<<9)) != 0, WBNOINVD)
+		fs.setIf((b&(1<<8)) != 0, MCOMMIT)
+		fs.setIf((b&(1<<13)) != 0, INT_WBINVD)
+		fs.setIf((b&(1<<4)) != 0, RDPRU)
+		fs.setIf((b&(1<<3)) != 0, INVLPGB)
+		fs.setIf((b&(1<<1)) != 0, MSRIRC)
+		fs.setIf((b&(1<<0)) != 0, CLZERO)
 	}
 
 	if maxExtendedFunction() >= 0x8000001b && fs.inSet(IBS) {
diff --git a/vendor/github.com/klauspost/cpuid/v2/detect_x86.go b/vendor/github.com/klauspost/cpuid/v2/detect_x86.go
index 93bc20f4..367c35c8 100644
--- a/vendor/github.com/klauspost/cpuid/v2/detect_x86.go
+++ b/vendor/github.com/klauspost/cpuid/v2/detect_x86.go
@@ -30,6 +30,6 @@ func addInfo(c *CPUInfo, safe bool) {
 	c.LogicalCores = logicalCores()
 	c.PhysicalCores = physicalCores()
 	c.VendorID, c.VendorString = vendorID()
-	c.Hz = hertz(c.BrandName)
 	c.cacheSize()
+	c.frequencies()
 }
diff --git a/vendor/github.com/klauspost/cpuid/v2/featureid_string.go b/vendor/github.com/klauspost/cpuid/v2/featureid_string.go
index 0e764f90..b1fe42e4 100644
--- a/vendor/github.com/klauspost/cpuid/v2/featureid_string.go
+++ b/vendor/github.com/klauspost/cpuid/v2/featureid_string.go
@@ -24,103 +24,115 @@ func _() {
 	_ = x[AVX512DQ-14]
 	_ = x[AVX512ER-15]
 	_ = x[AVX512F-16]
-	_ = x[AVX512IFMA-17]
-	_ = x[AVX512PF-18]
-	_ = x[AVX512VBMI-19]
-	_ = x[AVX512VBMI2-20]
-	_ = x[AVX512VL-21]
-	_ = x[AVX512VNNI-22]
-	_ = x[AVX512VP2INTERSECT-23]
-	_ = x[AVX512VPOPCNTDQ-24]
-	_ = x[AVXSLOW-25]
-	_ = x[BMI1-26]
-	_ = x[BMI2-27]
-	_ = x[CLDEMOTE-28]
-	_ = x[CLMUL-29]
-	_ = x[CMOV-30]
-	_ = x[CX16-31]
-	_ = x[ENQCMD-32]
-	_ = x[ERMS-33]
-	_ = x[F16C-34]
-	_ = x[FMA3-35]
-	_ = x[FMA4-36]
-	_ = x[GFNI-37]
-	_ = x[HLE-38]
-	_ = x[HTT-39]
-	_ = x[HYPERVISOR-40]
-	_ = x[IBPB-41]
-	_ = x[IBS-42]
-	_ = x[IBSBRNTRGT-43]
-	_ = x[IBSFETCHSAM-44]
-	_ = x[IBSFFV-45]
-	_ = x[IBSOPCNT-46]
-	_ = x[IBSOPCNTEXT-47]
-	_ = x[IBSOPSAM-48]
-	_ = x[IBSRDWROPCNT-49]
-	_ = x[IBSRIPINVALIDCHK-50]
-	_ = x[LZCNT-51]
-	_ = x[MMX-52]
-	_ = x[MMXEXT-53]
-	_ = x[MOVDIR64B-54]
-	_ = x[MOVDIRI-55]
-	_ = x[MPX-56]
-	_ = x[NX-57]
-	_ = x[POPCNT-58]
-	_ = x[RDRAND-59]
-	_ = x[RDSEED-60]
-	_ = x[RDTSCP-61]
-	_ = x[RTM-62]
-	_ = x[SERIALIZE-63]
-	_ = x[SGX-64]
-	_ = x[SGXLC-65]
-	_ = x[SHA-66]
-	_ = x[SSE-67]
-	_ = x[SSE2-68]
-	_ = x[SSE3-69]
-	_ = x[SSE4-70]
-	_ = x[SSE42-71]
-	_ = x[SSE4A-72]
-	_ = x[SSSE3-73]
-	_ = x[STIBP-74]
-	_ = x[TBM-75]
-	_ = x[TSXLDTRK-76]
-	_ = x[VAES-77]
-	_ = x[VMX-78]
-	_ = x[VPCLMULQDQ-79]
-	_ = x[WAITPKG-80]
-	_ = x[WBNOINVD-81]
-	_ = x[XOP-82]
-	_ = x[AESARM-83]
-	_ = x[ARMCPUID-84]
-	_ = x[ASIMD-85]
-	_ = x[ASIMDDP-86]
-	_ = x[ASIMDHP-87]
-	_ = x[ASIMDRDM-88]
-	_ = x[ATOMICS-89]
-	_ = x[CRC32-90]
-	_ = x[DCPOP-91]
-	_ = x[EVTSTRM-92]
-	_ = x[FCMA-93]
-	_ = x[FP-94]
-	_ = x[FPHP-95]
-	_ = x[GPA-96]
-	_ = x[JSCVT-97]
-	_ = x[LRCPC-98]
-	_ = x[PMULL-99]
-	_ = x[SHA1-100]
-	_ = x[SHA2-101]
-	_ = x[SHA3-102]
-	_ = x[SHA512-103]
-	_ = x[SM3-104]
-	_ = x[SM4-105]
-	_ = x[SVE-106]
-	_ = x[lastID-107]
+	_ = x[AVX512FP16-17]
+	_ = x[AVX512IFMA-18]
+	_ = x[AVX512PF-19]
+	_ = x[AVX512VBMI-20]
+	_ = x[AVX512VBMI2-21]
+	_ = x[AVX512VL-22]
+	_ = x[AVX512VNNI-23]
+	_ = x[AVX512VP2INTERSECT-24]
+	_ = x[AVX512VPOPCNTDQ-25]
+	_ = x[AVXSLOW-26]
+	_ = x[BMI1-27]
+	_ = x[BMI2-28]
+	_ = x[CLDEMOTE-29]
+	_ = x[CLMUL-30]
+	_ = x[CLZERO-31]
+	_ = x[CMOV-32]
+	_ = x[CPBOOST-33]
+	_ = x[CX16-34]
+	_ = x[ENQCMD-35]
+	_ = x[ERMS-36]
+	_ = x[F16C-37]
+	_ = x[FMA3-38]
+	_ = x[FMA4-39]
+	_ = x[GFNI-40]
+	_ = x[HLE-41]
+	_ = x[HTT-42]
+	_ = x[HWA-43]
+	_ = x[HYPERVISOR-44]
+	_ = x[IBPB-45]
+	_ = x[IBS-46]
+	_ = x[IBSBRNTRGT-47]
+	_ = x[IBSFETCHSAM-48]
+	_ = x[IBSFFV-49]
+	_ = x[IBSOPCNT-50]
+	_ = x[IBSOPCNTEXT-51]
+	_ = x[IBSOPSAM-52]
+	_ = x[IBSRDWROPCNT-53]
+	_ = x[IBSRIPINVALIDCHK-54]
+	_ = x[INT_WBINVD-55]
+	_ = x[INVLPGB-56]
+	_ = x[LZCNT-57]
+	_ = x[MCAOVERFLOW-58]
+	_ = x[MCOMMIT-59]
+	_ = x[MMX-60]
+	_ = x[MMXEXT-61]
+	_ = x[MOVDIR64B-62]
+	_ = x[MOVDIRI-63]
+	_ = x[MPX-64]
+	_ = x[MSRIRC-65]
+	_ = x[NX-66]
+	_ = x[POPCNT-67]
+	_ = x[RDPRU-68]
+	_ = x[RDRAND-69]
+	_ = x[RDSEED-70]
+	_ = x[RDTSCP-71]
+	_ = x[RTM-72]
+	_ = x[RTM_ALWAYS_ABORT-73]
+	_ = x[SERIALIZE-74]
+	_ = x[SGX-75]
+	_ = x[SGXLC-76]
+	_ = x[SHA-77]
+	_ = x[SSE-78]
+	_ = x[SSE2-79]
+	_ = x[SSE3-80]
+	_ = x[SSE4-81]
+	_ = x[SSE42-82]
+	_ = x[SSE4A-83]
+	_ = x[SSSE3-84]
+	_ = x[STIBP-85]
+	_ = x[SUCCOR-86]
+	_ = x[TBM-87]
+	_ = x[TSXLDTRK-88]
+	_ = x[VAES-89]
+	_ = x[VMX-90]
+	_ = x[VPCLMULQDQ-91]
+	_ = x[WAITPKG-92]
+	_ = x[WBNOINVD-93]
+	_ = x[XOP-94]
+	_ = x[AESARM-95]
+	_ = x[ARMCPUID-96]
+	_ = x[ASIMD-97]
+	_ = x[ASIMDDP-98]
+	_ = x[ASIMDHP-99]
+	_ = x[ASIMDRDM-100]
+	_ = x[ATOMICS-101]
+	_ = x[CRC32-102]
+	_ = x[DCPOP-103]
+	_ = x[EVTSTRM-104]
+	_ = x[FCMA-105]
+	_ = x[FP-106]
+	_ = x[FPHP-107]
+	_ = x[GPA-108]
+	_ = x[JSCVT-109]
+	_ = x[LRCPC-110]
+	_ = x[PMULL-111]
+	_ = x[SHA1-112]
+	_ = x[SHA2-113]
+	_ = x[SHA3-114]
+	_ = x[SHA512-115]
+	_ = x[SM3-116]
+	_ = x[SM4-117]
+	_ = x[SVE-118]
+	_ = x[lastID-119]
 	_ = x[firstID-0]
 }
 
-const _FeatureID_name = "firstIDADXAESNIAMD3DNOWAMD3DNOWEXTAMXBF16AMXINT8AMXTILEAVXAVX2AVX512BF16AVX512BITALGAVX512BWAVX512CDAVX512DQAVX512ERAVX512FAVX512IFMAAVX512PFAVX512VBMIAVX512VBMI2AVX512VLAVX512VNNIAVX512VP2INTERSECTAVX512VPOPCNTDQAVXSLOWBMI1BMI2CLDEMOTECLMULCMOVCX16ENQCMDERMSF16CFMA3FMA4GFNIHLEHTTHYPERVISORIBPBIBSIBSBRNTRGTIBSFETCHSAMIBSFFVIBSOPCNTIBSOPCNTEXTIBSOPSAMIBSRDWROPCNTIBSRIPINVALIDCHKLZCNTMMXMMXEXTMOVDIR64BMOVDIRIMPXNXPOPCNTRDRANDRDSEEDRDTSCPRTMSERIALIZESGXSGXLCSHASSESSE2SSE3SSE4SSE42SSE4ASSSE3STIBPTBMTSXLDTRKVAESVMXVPCLMULQDQWAITPKGWBNOINVDXOPAESARMARMCPUIDASIMDASIMDDPASIMDHPASIMDRDMATOMICSCRC32DCPOPEVTSTRMFCMAFPFPHPGPAJSCVTLRCPCPMULLSHA1SHA2SHA3SHA512SM3SM4SVElastID"
+const _FeatureID_name = "firstIDADXAESNIAMD3DNOWAMD3DNOWEXTAMXBF16AMXINT8AMXTILEAVXAVX2AVX512BF16AVX512BITALGAVX512BWAVX512CDAVX512DQAVX512ERAVX512FAVX512FP16AVX512IFMAAVX512PFAVX512VBMIAVX512VBMI2AVX512VLAVX512VNNIAVX512VP2INTERSECTAVX512VPOPCNTDQAVXSLOWBMI1BMI2CLDEMOTECLMULCLZEROCMOVCPBOOSTCX16ENQCMDERMSF16CFMA3FMA4GFNIHLEHTTHWAHYPERVISORIBPBIBSIBSBRNTRGTIBSFETCHSAMIBSFFVIBSOPCNTIBSOPCNTEXTIBSOPSAMIBSRDWROPCNTIBSRIPINVALIDCHKINT_WBINVDINVLPGBLZCNTMCAOVERFLOWMCOMMITMMXMMXEXTMOVDIR64BMOVDIRIMPXMSRIRCNXPOPCNTRDPRURDRANDRDSEEDRDTSCPRTMRTM_ALWAYS_ABORTSERIALIZESGXSGXLCSHASSESSE2SSE3SSE4SSE42SSE4ASSSE3STIBPSUCCORTBMTSXLDTRKVAESVMXVPCLMULQDQWAITPKGWBNOINVDXOPAESARMARMCPUIDASIMDASIMDDPASIMDHPASIMDRDMATOMICSCRC32DCPOPEVTSTRMFCMAFPFPHPGPAJSCVTLRCPCPMULLSHA1SHA2SHA3SHA512SM3SM4SVElastID"
 
-var _FeatureID_index = [...]uint16{0, 7, 10, 15, 23, 34, 41, 48, 55, 58, 62, 72, 84, 92, 100, 108, 116, 123, 133, 141, 151, 162, 170, 180, 198, 213, 220, 224, 228, 236, 241, 245, 249, 255, 259, 263, 267, 271, 275, 278, 281, 291, 295, 298, 308, 319, 325, 333, 344, 352, 364, 380, 385, 388, 394, 403, 410, 413, 415, 421, 427, 433, 439, 442, 451, 454, 459, 462, 465, 469, 473, 477, 482, 487, 492, 497, 500, 508, 512, 515, 525, 532, 540, 543, 549, 557, 562, 569, 576, 584, 591, 596, 601, 608, 612, 614, 618, 621, 626, 631, 636, 640, 644, 648, 654, 657, 660, 663, 669}
+var _FeatureID_index = [...]uint16{0, 7, 10, 15, 23, 34, 41, 48, 55, 58, 62, 72, 84, 92, 100, 108, 116, 123, 133, 143, 151, 161, 172, 180, 190, 208, 223, 230, 234, 238, 246, 251, 257, 261, 268, 272, 278, 282, 286, 290, 294, 298, 301, 304, 307, 317, 321, 324, 334, 345, 351, 359, 370, 378, 390, 406, 416, 423, 428, 439, 446, 449, 455, 464, 471, 474, 480, 482, 488, 493, 499, 505, 511, 514, 530, 539, 542, 547, 550, 553, 557, 561, 565, 570, 575, 580, 585, 591, 594, 602, 606, 609, 619, 626, 634, 637, 643, 651, 656, 663, 670, 678, 685, 690, 695, 702, 706, 708, 712, 715, 720, 725, 730, 734, 738, 742, 748, 751, 754, 757, 763}
 
 func (i FeatureID) String() string {
 	if i < 0 || i >= FeatureID(len(_FeatureID_index)-1) {